8-bit folding ADC based on switched capacitor

Author

Costa, Wendell E. M. ; Rodrigues, Sidney A. ; Freire, Raimundo Carlos S. ; Cavalcanti Catunda, Sebastian Yuri ; Rangel de Sousa, Fernando

Author_Institution

Ind. Coordination, Fed. Inst. of Tocantins (IFTO), Palmas, Brazil

fYear

2013

fDate

6-9 May 2013

Firstpage

1559

Lastpage

1563

Abstract

This paper presents an 8-bit folding analog-digital converter (ADC) using switched capacitors. In this architecture, the conversion is achieved when the signal crosses a determined voltage level and at this time, a voltage value is added or subtracted from the analog input signal. The ADC proposed consists of eight identical stages that perform the conversion of one bit at a time. Each stage consists of an amplifier circuit with a gain of 2 using switched capacitor. The ADC is designed in 0.35 μm CMOS standard technology. When supplied with 3.3 V, the proposed ADC consumes a power of 2.5 mW and presents the following results: conversion time of 100 ns and 45.8 dB of SNDR (Signal to noise plus distortion ratio).

Keywords

CMOS integrated circuits; analogue-digital conversion; switched capacitor networks; 8-bit folding ADC; CMOS standard technology; SNDR; amplifier circuit; determined voltage level; power 2.5 mW; signal to noise plus distortion ratio; switched capacitor; time 100 ns; voltage value; CMOS integrated circuits; Capacitors; Clocks; Operational amplifiers; Pipelines; Power demand; Switches; Analog Signal Processing; Analog-to-Digital Converter (ADC); Switched Capacitor;

fLanguage

English

Publisher

ieee

Conference_Titel

Instrumentation and Measurement Technology Conference (I2MTC), 2013 IEEE International

Conference_Location

Minneapolis, MN

ISSN

1091-5281

Print_ISBN

978-1-4673-4621-4

Type

conf

DOI

10.1109/I2MTC.2013.6555676

Filename

6555676