DocumentCode
618492
Title
Integrated circuit layout design screening
Author
Chari, K.S. ; Sharma, Mukesh
Author_Institution
Gov. of India, New Delhi, India
fYear
2013
fDate
11-12 April 2013
Firstpage
1305
Lastpage
1308
Abstract
Integrated Circuits (IC) have evolved over the last few decades from modest circuit complexities to highly complex circuit realizations in meeting the market needs. Considering the heavy investments of time, manpower and financial resources in the development of the advanced chips, the original developers of the chip, per force, take steps to protect the various Intellectual Properties (IP) through appropriate IP regimes operating in their countries. In the competitive world of numerous product ranges and less time to market the products, the probabilities of infringements i.e copying of earlier works into the circuits is increasing and hence, there is severe need of capturing the circuit elements with infringements. The IP registering authorities would assess and in some cases evaluate the IC Layout Design filings made for the chip submitted for IP registration including absence of infringements. A well informed developer will also be vigilant to monitor the market to trace any illegal circuit infringement business through copying of their chip works. From these perspectives, it can be seen that screening of the IC Layout Designs (ICLDs) in detail including comparing them with suspicious candidates becomes vital.
Keywords
copy protection; industrial property; integrated circuit layout; IC layout design filing evaluation; IP regimes; IP registration; circuit complexities; financial resource investment; highly complex circuit realizations; illegal circuit infringement business; infringement absence; infringement probabilities; integrated circuit layout design screening; intellectual properties; manpower resource investment; market needs; time investment; Data mining; Databases; Geometry; IP networks; Integrated circuits; Layout; Visualization; Guidelines and Infrastructure for Layout comparison; IC Layouts; ICLD comparison and validation techniques; Intellectual Property;
fLanguage
English
Publisher
ieee
Conference_Titel
Information & Communication Technologies (ICT), 2013 IEEE Conference on
Conference_Location
JeJu Island
Print_ISBN
978-1-4673-5759-3
Type
conf
DOI
10.1109/CICT.2013.6558303
Filename
6558303
Link To Document