• DocumentCode
    620305
  • Title

    Evolutionary topology programming for analog circuit fault tolerant design

  • Author

    Mei Xue ; Jingsong He

  • Author_Institution
    Dept. of Electron. Sci. & Technol., Univ. of Sci. & Technol. of China, Hefei, China
  • fYear
    2013
  • fDate
    25-27 May 2013
  • Firstpage
    3391
  • Lastpage
    3396
  • Abstract
    In this paper, an evolutionary programming strategy based on netlist-based encoding is proposed. During the evolutionary process, mutation operators directly operate the connecting points. Besides that, we introduce the knowledge of graph theory into measuring the richness of circuit topological structure. Experimental results show that the proposed method is beneficial to generate circuits with various topologies. The experimental results of fault-tolerant tests based on structural failure model show that the richness of circuit topological structure is helpful to improving the fault-tolerant capability of analog circuits.
  • Keywords
    analogue circuits; circuit testing; evolutionary computation; fault tolerant computing; graph theory; mathematical operators; network synthesis; network topology; analog circuit fault tolerant design; circuit topological structure; connecting points; evolutionary topology programming strategy; fault-tolerant tests; graph theory; mutation operators; netlist-based encoding method; structural failure model; Analog circuits; Fault tolerance; Fault tolerant systems; Joining processes; Sociology; Statistics; Topology; Design automation; analog circuits; fault tolerant; rich topology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Control and Decision Conference (CCDC), 2013 25th Chinese
  • Conference_Location
    Guiyang
  • Print_ISBN
    978-1-4673-5533-9
  • Type

    conf

  • DOI
    10.1109/CCDC.2013.6561534
  • Filename
    6561534