A low power 1-MHz continuous-time ΣΔM Using a passive loop filter designed with a genetic algorithm tool

This paper describes the design of a continuous-time amplifier-less second-order Sigma-Delta modulator (ΣΔM). In modern CMOS technologies the intrinsic gain of the transistors is low, which increases the difficulty of designing high gain amplifiers. The proposed ΣΔM uses a passive filter topology and therefore does not require an amplifier circuit. In order to maximize the performance, the circuit is optimized using genetic algorithms. The resulting circuit, designed in a 130 nm CMOS technology, has a bandwidth of 1 MHz for a clock frequency of 200 MHz. The electrical simulation results show that it achieves a maximum signal-to-noise-plus-distortion ratio (SNDR) of 52.8 dB and a dynamic range of 58 dB while dissipating 95 μW which corresponds to an efficiency of 133 fJ/conv.