• DocumentCode
    626604
  • Title

    TURNUS: A design exploration framework for dataflow system design

  • Author

    Brunei, Simone Casale ; Mattavelli, Marco ; Janneck, J.W.

  • Author_Institution
    SCI-STI-MM Multimedia Group, Ecole Polytech. Fed. de Lausanne, Lausanne, Switzerland
  • fYear
    2013
  • fDate
    19-23 May 2013
  • Firstpage
    654
  • Lastpage
    654
  • Abstract
    While research on the design of heterogeneous concurrent systems has a long and rich history, a unified design methodology and tool support has not emerged so far, and thus the creation of such systems remains a difficult, time-consuming and error-prone process. The absence of principled support for system evaluation and optimization at high abstraction levels makes the quality of the resulting implementation highly dependent on the experience or prejudices of the designer. This is particularly critical when the combinatorial explosion of design parameters overwhelms available optimization tools. In this work we address these matters by presenting a unified design exploration framework suitable for a wide range of different target platforms. The design is unified and implemented at high level by using a standard dataflow language, while the target platform is described using the IP-XACT standard. This facilitates different design space heuristics that guide the designer during validation and optimization stages without requiring low-level implementations of parts of the application. Our framework currently yields exploration and optimization results in terms of application throughput and buffer size dimensioning, although other co-exploration and optimization heuristics are available.
  • Keywords
    data flow analysis; hardware-software codesign; languages; IP-XACT standard; TURNUS; dataflow system design; design exploration framework; error-prone process; heterogeneous concurrent systems; standard dataflow language; time-consuming; Design methodology; Educational institutions; Optimization; Space exploration; Standards; Throughput; Transform coding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
  • Conference_Location
    Beijing
  • ISSN
    0271-4302
  • Print_ISBN
    978-1-4673-5760-9
  • Type

    conf

  • DOI
    10.1109/ISCAS.2013.6571927
  • Filename
    6571927