DocumentCode
626776
Title
Memory efficient EMS decoding for non-binary LDPC codes
Author
Leixin Zhou ; Jin Sha ; Yun Chen ; Zhongfeng Wang
Author_Institution
Sch. of Electron. Sci. & Eng., Nanjing Univ., Nanjing, China
fYear
2013
fDate
19-23 May 2013
Firstpage
1336
Lastpage
1339
Abstract
Non-binary low-density parity-check (NB-LDPC) codes are an extension of binary LDPC codes with significantly better performance when the code length is moderate. Previously, forward-backward schemes are used to implement check node processing, which need large amount of memory. In this paper, a novel approach-TCL-EMS is proposed for NB-LDPC decoding. Compared to original EMS decoding algorithm, the memory efficiency is improved and the average number of iterations is reduced significantly. Also, the overall decoder architecture is proposed.
Keywords
decoding; parity check codes; NB-LDPC decoding; TCL-EMS approach; check node processing; code length; decoder architecture; forward-backward scheme; iteration number; memory efficiency; memory-efficient EMS decoding algorithm; nonbinary LDPC codes; nonbinary low-density parity-check codes; truncated column layered extended min-sum decoding scheme; Algorithm design and analysis; Decoding; Iterative decoding; Memory management; Quantization (signal);
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
Conference_Location
Beijing
ISSN
0271-4302
Print_ISBN
978-1-4673-5760-9
Type
conf
DOI
10.1109/ISCAS.2013.6572101
Filename
6572101
Link To Document