Integrator swing reduction in feedback compensated Sigma-Delta modulators

This paper describes a method to improve the linearity, area or SNR of feedback (FB) compensated Sigma-Delta (ΣΔ) modulators. These performance limiting factors are often related to the outer loop feedback DAC or to the 1^st integrator of the ΣΔ-modulator in a FB-compensated modulator. This work focuses on improvements of the 1^st integrator. The origin of these problems is the output swing of the 1^st integrator, which includes and is dominated by the input signal. This problem is usually solved by increasing the capacitor size of this integrator, which results in an increased area and power. Another common solution is to use a feed-forward (FF) compensated ΣΔ-modulator, where basically only quantization noise is processed by the 1^st integrator. However the drawback of this approach is a usually wide bandwidth and peaking of the modulator´s signal transfer function (STF). The proposed solution greatly reduces signal swing at the 1^st integrator, by not affecting the STF. Thus, it takes the advantages of the FF-topology, by keeping the advantages of the FB-topology.