DocumentCode
627079
Title
Electronically programmable test points for on-chip analog/digital measurements
Author
Franco, Marc ; Guiza, J. ; Chiappetta, E. ; Rueda, Sylvia ; Luis, H. ; Bertuzzo, J. ; Koeppe, Jim ; Robins, T. ; Jenkins, J. ; Hamilton, T.
Author_Institution
Inst. de Pesquisas Eldorado, Campinas, Brazil
fYear
2013
fDate
19-23 May 2013
Firstpage
2670
Lastpage
2673
Abstract
This paper presents a flexible solution for performing measurements of internal chip signals at the bench, which reduces overall system costs and test risks. It also makes available a way to insert signals at predefined nodes and to bring the system to a specified state. For this purpose, we use a Serial-to-Parallel Interface (SPI) block with a simple communication protocol, which enables the designer to reconfigure as many internal test structures as desired, as well as to drive different internal signals to or from the chip pads. As these pads are reconfigurable, their number can be reduced to a minimum, which in turn reduces silicon area and die cost. The need to use physically intrusive micro probes is reduced and, most importantly, it allows the possibility to acquire internal signals of fully encapsulated dies.
Keywords
elemental semiconductors; integrated circuit testing; microprocessor chips; protocols; silicon; SPI block; Si; chip pads; die cost; electronically programmable test points; internal chip signals; internal test structures; intrusive microprobes; on-chip analog-digital measurements; serial-to-parallel interface block; silicon area; simple communication protocol; Current measurement; Probes; Protocols; Semiconductor device measurement; Standards; Temperature measurement; Voltage measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2013 IEEE International Symposium on
Conference_Location
Beijing
ISSN
0271-4302
Print_ISBN
978-1-4673-5760-9
Type
conf
DOI
10.1109/ISCAS.2013.6572428
Filename
6572428
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