DocumentCode
62799
Title
A Variant of Parallel Plane Sweep Algorithm for Multicore Systems
Author
Khlopotine, A.B. ; Jandhyala, Vikram ; Kirkpatrick, D.
Author_Institution
Univ. of Washington, Seattle, WA, USA
Volume
32
Issue
6
fYear
2013
fDate
Jun-13
Firstpage
966
Lastpage
970
Abstract
Parallel algorithms used in Very Large Scale Integration physical design bring significant challenges for their efficient and effective design and implementation. The rectangle intersection problem is a subset of the plane sweep problem, a topic of computational geometry and a component in design rule checking, parasitic resistance-capacitance extraction, and mask processing flows. A variant of a plane sweep algorithm that is embarrassingly parallel and therefore easily scalable on multicore machines and clusters, while exceeding the best-known parallel plane sweep algorithms on real-world tests, is presented in this letter.
Keywords
VLSI; capacitance; computational geometry; electric resistance; electronic engineering computing; multiprocessing systems; parallel algorithms; computational geometry; design rule checking; embarrassingly parallel algorithm; mask processing flows; multicore machines; multicore systems; parallel plane sweep algorithm; parasitic resistance-capacitance extraction; real-world tests; rectangle intersection problem; very large scale integration physical design; Algorithm design and analysis; Complexity theory; Data structures; Heuristic algorithms; Program processors; Runtime; Scalability; Computational geometry; multicore; physical design; plane sweep; rectangle intersection;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2013.2245940
Filename
6516597
Link To Document