Reliability studies on micro-bumps for 3-D TSV integration

Recently, the demand on the 3-D integration using through-silicon vias (TSVs) and micro-bumps has been increasing for better electrical performance and smaller form factor. However, lots of doubtful concerns on the reliability of 3-D stacked chips still exist, which are Cu TSV expansion, transistor degradation or open failures on Cu contamination, micro-bump stress, and so on. In this study, we investigated thermal reliabilities of the micro-bump solder joints in terms of the growth behavior of intermetallic compounds (IMCs) and high temperature reliability for various bump structures. IMC growth behavior has been studied as a number of reflow times and as a function of aging temperature. Furthermore, we performed high temperature storage (HTS) and thermal cycling (TC) tests. As a result, we found out the most reliable bump structure which guarantees the 2000 cycles for TC and 2016 hours for HTS test.