A highly integratable millimeter-wave silicon waveguide array for Terabit application

Multi-core scalar CPU are approaching processing rates of 256 GFLOPS. Transport latency and bandwidth (BW) between DRAM and processor are a substantial bottleneck to optimal system performance. This is, in large part, because board level, data transport occurs over legacy L-C transmission lines having limited BW over a limited distance. Consequently, high performance, systems running memory intensive applications are able to utilize only a fraction of their available computational potential and remain idle for many clock cycles while waiting for data and instructions. This paper proposes guided millimeter wave on a socket as a BW scalable inter-chip communication interface. Scalability is afforded by high order digital modulation of the guided carrier wave and the wide, re-usable, free spectral range within each waveguide that can accommodate multiple full duplex channels.