Challenges of chip-to-package interaction for 22nm technology with ultra low k and Pb-free interconnects

Author

Muzzy, Chris ; Bisson, Richard ; Cincotta, John ; Degraw, Danielle ; Engbrecht, Edward ; Gill, Jaswinder ; Lustig, Naftali ; McLaughlin, Keiran ; Ouimet, Sylvain ; Ross, James ; Turnbull, D.

Author_Institution

IBM Corp., Essex Junction, VT, USA

fYear

2013

fDate

28-31 May 2013

Firstpage

402

Lastpage

405

Abstract

A review of the chip-to-package interaction (CPI) results during the development and qualification of IBM´s 22SOI high performance technology will be presented. Initial results and failure modes using ultra low-k (ULK) dielectric BEOL during the early development phase are shown. The fail modes include BEOL cracking under solder pads due to ULK formulations, from both planned material formulations and material properties related to tool excursion events, and leakage failures under high temperature, bias, and moisture attributed to incomplete formation of die edge seal. Full qualification data on a final robust process showing excellent CPI performance for this technology node are presented.

Keywords

chip scale packaging; dielectric materials; electrical faults; failure analysis; interconnections; seals (stoppers); BEOL cracking; CPI; IBM 22SOI high performance technology; ULK dielectric BEOL; chip-to-package interaction; die edge seal; lead-free interconnects; leakage failures; planned material formulations; ultra low k interconnects; ultra low-k dielectric BEOL; Assembly; Dielectrics; Materials; Moisture; Reliability; Stress; Vehicles;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Components and Technology Conference (ECTC), 2013 IEEE 63rd

Conference_Location

Las Vegas, NV

ISSN

0569-5503

Print_ISBN

978-1-4799-0233-0

Type

conf

DOI

10.1109/ECTC.2013.6575602

Filename

6575602