• DocumentCode
    628474
  • Title

    3D vs 2D modeling of the effect of die size on delamination in encapsulated IC packages

  • Author

    Siow Ling Ho ; Tay, A.A.O.

  • Author_Institution
    Inst. of Microelectron., A*STAR (Agency for Sci., Technol. & Res.), Singapore, Singapore
  • fYear
    2013
  • fDate
    28-31 May 2013
  • Firstpage
    807
  • Lastpage
    812
  • Abstract
    In a previous 2D parametric study, it was found that the die size appear to have no significant effect on the likelihood of delamination at the pad-encapsulant interface in a plastic-encapsulated IC package. This trend appears to be counter intuitive since in practice, it is known that larger dies are more likely to delaminate in comparison with smaller ones. The authors had speculated that this could be due to the limitations of 2D analysis. Hence this finding is re-investigated using 3D analysis. In this parametric study, 3D finite element models that incorporate an initial delamination a corner delamination of different shapes (concave, convex, straight) were analyzed. The geometric parameters varied include the size of the pad, the die and the package. Both the energy release rate and mode mixity were calculated. It was found that in 3D analysis, different shapes of initial delaminations result in similar trends in the propensity to delaminate from the corners. From the results of the 3D analyses of a package with an initial corner delamination, it was found that increasing the die size leads to an increase in ERR, and hence an increase in the likelihood of delamination from the corners of a package. This trend is in contrast to that predicted from the 2D analyses, that ERR do not increase with increasing die sizes. The above findings seem to suggest that for predicting delamination from the corners of a package, which is usually where the highest stress is located, only a 3D analysis will be adequate.
  • Keywords
    delamination; encapsulation; finite element analysis; integrated circuit packaging; three-dimensional integrated circuits; 2D modeling; 2D parametric study; 3D finite element model; ERR; concave shape; convex shape; corner delamination; die size; energy release rate; geometric parameters; initial delamination; mode mixity; pad-encapsulant interface; plastic-encapsulated IC package; straight shape; stress analysis; Analytical models; Delamination; Finite element analysis; Integrated circuit modeling; Parametric study; Shape; Solid modeling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference (ECTC), 2013 IEEE 63rd
  • Conference_Location
    Las Vegas, NV
  • ISSN
    0569-5503
  • Print_ISBN
    978-1-4799-0233-0
  • Type

    conf

  • DOI
    10.1109/ECTC.2013.6575666
  • Filename
    6575666