• DocumentCode
    628494
  • Title

    Nano-Silica Composite Laminate

  • Author

    Hayashi, K. ; Nagasawa, T. ; Matsumoto, Kaname ; Kawai, Shigeaki

  • Author_Institution
    KYOCERA Corp., Kirishima, Japan
  • fYear
    2013
  • fDate
    28-31 May 2013
  • Firstpage
    929
  • Lastpage
    936
  • Abstract
    This paper introduces a newly-developed Nano-Silica Composite Laminate packaging technology that utilizes a nano-silica matrix composite material with outstanding properties. Nano-Silica Composite Laminate packaging technology enables us to create a thinner, downsized packaging that is less susceptible to warpage. In order to verify the advantageous properties of Nano-Silica Composite Laminate, we measured the degree of warpage by utilizing a dielectric test substrate that was composed of Nano-Silica Composite Laminate and resin films. The results obtained in this study demonstrated that the dielectric material created using Nano-Silica Composite Laminate allows us to avoid the resin´s undesirable tendency of allowing the coefficient of thermal expansion (CTE) to increase when the temperature rises beyond the glass transition temperature. The storage modulus of Nano-Silica Composite Laminate showed 30 GPa, which is more than five times higher than that of ordinary resin. Therefore, we were able to confirm that using Nano-Silica Composite Laminate contributes to decreasing warpage of the conventional substrate during the packaging process. Furthermore, we confirmed that the test substrate has the following extremely reliable properties: it can maintain both conductivity and dielectricity under the conditions of both a line/space width of 10/10μm and a via diameter of 30 μm. Consequently, through the test results it has been confirmed that Nano-Silica Composite Laminate is one of the most appropriate substrates available to strengthen the interconnection between a silicon chip and substrate, and to protect the large-scale integrated (LSI) circuits from breaking.
  • Keywords
    dielectric materials; integrated circuit interconnections; laminates; large scale integration; packaging; silicon compounds; thermal expansion; CTE; LSI circuits; SiO2; dielectric material; dielectric test substrate; glass transition temperature; interconnection; large-scale integrated circuits; nanosilica composite laminate packaging; nanosilica matrix composite material; resin films; silicon chip; storage modulus; thermal expansion coefficient; Copper; Films; Laminates; Resins; Substrates; Temperature measurement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference (ECTC), 2013 IEEE 63rd
  • Conference_Location
    Las Vegas, NV
  • ISSN
    0569-5503
  • Print_ISBN
    978-1-4799-0233-0
  • Type

    conf

  • DOI
    10.1109/ECTC.2013.6575686
  • Filename
    6575686