DocumentCode
628609
Title
Small diameter via filling electrodeposition by periodical reverse current
Author
Hayashi, Teruaki ; Kondo, K. ; Saito, Takashi ; Okamoto, N. ; Yokoi, Masayuki ; Takeuchi, Masaru ; Bunya, Masaru ; Marunaka, Masao ; Tsuchiya, Takao
Author_Institution
Dept. of Chem. Eng., Osaka Prefecture Univ., Sakai, Japan
fYear
2013
fDate
28-31 May 2013
Firstpage
1697
Lastpage
1702
Abstract
To enable low power consumption and the access speed increase, three dimensional packaging of semiconductor chips has been proposed. In particular, a high-aspect ratio through silicon via (TSV) allows short chip to chip interconnection. 4 μm diameter and aspect ratio of 7.5 via TSV has filled. The perfect via filling was achieved within 25 minutes with the increasing irev/|ion| ratios of periodic reverse pulse current waveform. In addition, we evaluated produced cuprous ion concentration during electrodeposition by using rotating ring disk electrode (RRDE). From the electrochemical measurement by RRDE, cuprous ion concentration on the reactive surface was markedly increasing with the increasing irev/|ion| ratios. At irev/|ion| ratio of large (irev/|ion| = 6.0), a large amount of cuprous ion concentration produces during copper dissolution by reverse current and cuprous ion remain at via bottom. High cuprous ion concentration at via bottom accelerates deposition at via bottom and achieve bottom up filling. In this study, we simulated Cu+ concentration profile by the numerical computation of fluid dynamics. The results will be compared with the electrodeposits profiles in the small diameter via.
Keywords
electrodeposition; integrated circuit interconnections; integrated circuit packaging; low-power electronics; three-dimensional integrated circuits; RRDE; TSV; bottom accelerates deposition; chip to chip interconnection; electrochemical measurement; electrodeposition; fluid dynamics; ion concentration; low power consumption; periodical reverse current; rotating ring disk electrode; semiconductor chips; size 4 mum; three dimensional packaging; through silicon via; time 25 min; Copper; Current measurement; Electric potential; Electrodes; Filling; Nitrogen; Through-silicon vias;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference (ECTC), 2013 IEEE 63rd
Conference_Location
Las Vegas, NV
ISSN
0569-5503
Print_ISBN
978-1-4799-0233-0
Type
conf
DOI
10.1109/ECTC.2013.6575802
Filename
6575802
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