• DocumentCode
    629124
  • Title

    2.6GHz ultra-wide voltage range energy efficient dual A9 in 28nm UTBB FD-SOI

  • Author

    Jacquet, D. ; Cesana, G. ; Flatresse, Philippe ; Arnaud, F. ; Menut, Patrick ; Hasbani, Frederic ; Di Gilio, Thierry ; Lecocq, Claire ; Roy, Tonmoy ; Chhabra, Amit ; Grover, Claire ; Minez, Olivier ; Uginet, Jacky ; Durieu, Guy ; Nyer, Frederic ; Adobati,

  • Author_Institution
    STMicroelectron., Grenoble, France
  • fYear
    2013
  • fDate
    11-13 June 2013
  • Abstract
    This paper presents the implementation details and silicon results of a 2.6GHz dual-core ARM Cortex A9 manufactured in a 28nm Ultra-Thin Body and BOX FD-SOI technology. The implementation is based on a fully synthesizable standard design flow, and the design exploits the great flexibility provided by FD-SOI technology, notably a wide Dynamic Voltage and Frequency Scaling (DVFS) range, from 0.6V to 1.2V, and forward body bias (FBB) techniques up to 1.3V bias voltage, thus enabling an extremely energy efficient implementation.
  • Keywords
    elemental semiconductors; energy conservation; high-k dielectric thin films; microprocessor chips; power aware computing; silicon; silicon-on-insulator; BOX FD-SOI technology; DVFS; FBB technique; Si; UTBB FD-SOI technology; bias voltage; dual-core ARM Cortex A9; dynamic voltage and frequency scaling; forward body bias; frequency 2.6 GHz; fully synthesizable standard design flow; size 28 nm; ultra-thin body; ultra-wide voltage range energy efficient dual A9; voltage 0.6 V to 1.2 V; Energy efficiency; Generators; Logic gates; Memory management; Multicore processing; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Technology (VLSIT), 2013 Symposium on
  • Conference_Location
    Kyoto
  • ISSN
    0743-1562
  • Print_ISBN
    978-1-4673-5226-0
  • Type

    conf

  • Filename
    6576623