Title :
Superior cut-off characteristics of Lg=40nm Wfin=7nm poly Ge junctionless Tri-gate FET for stacked 3D circuits integration
Author :
Kamata, Yukio ; Kamimuta, Y. ; Ikeda, Ken-ichi ; Furuse, Kazutaka ; Ono, M. ; Oda, Masaomi ; Moriyama, Y. ; Usuda, Koji ; Koike, Masakazu ; Irisawa, T. ; Kurosawa, Etsuo ; Tezuka, Taro
Author_Institution :
Green Nanoelectron. Center (GNC), Nat. Inst. of Adv. Ind. Sci. & Technol. (AIST), Tsukuba, Japan
Abstract :
Poly Ge junctionless (JL) Tri-gate p-FETs with Lg of 40nm and fin width of 7nm has been demonstrated. Major drawbacks in Ge channel such as junction leakage current and DIBL have been overcome by JL FETs with Tri-gate. Ion/Ioff >105 at Vd=-1V, SS=158mV/decade and DIBL of as small as 74mV/V are obtained, which are comparable or better than the counterparts of crystalline Ge devices. Vth roll-off as well as DIBL of JL FETs with thin W are improved in short channel regime.
Keywords :
elemental semiconductors; field effect transistors; germanium; three-dimensional integrated circuits; Ge; junction leakage current; junctionless tri-gate FET; pFET; size 40 nm; size 7 nm; stacked 3D circuit integration; superior cut off characteristics; voltage -1 V; Capacitance-voltage characteristics; Fabrication; Field effect transistors; Junctions; Lithography; Logic gates; Very large scale integration;
Conference_Titel :
VLSI Technology (VLSIT), 2013 Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-1-4673-5226-0
