Title :
A 288fs RMS jitter versatile 8–12.4GHz wide-band Fractional-N synthesizer for SONET and SerDes communication standards in 40nm CMOS
Author :
Ahmadi, Mahmoud Reza ; Pi, D. ; Catli, Burak ; Singh, Upendra ; Bo Zhang ; Zhi Huang ; Momtaz, Afshin ; Jun Cao
Author_Institution :
Broadcom Corp., Irvine, CA, USA
Abstract :
This paper presents a wide-band analog Fractional-N clock synthesizer operating from 8 to 12.4GHz suited for data communication standards. The synthesizer generates a low noise clock with rms jitter of 288-460fs, yet maintains wide loop bandwidth from 1.5 to 4.3MHz. The design consumes 16.9mW from a 1V supply, while occupying an area of 0.39mm2 in a 40nm CMOS technology.
Keywords :
CMOS integrated circuits; clocks; data communication; frequency synthesizers; integrated circuit design; jitter; CMOS; RMS jitter versatile; SONET; SerDes communication standards; frequency 8 GHz to 12.4 GHz; size 40 nm; time 288 fs to 460 fs; wide-band fractional-N synthesizer; Bandwidth; Clocks; Jitter; Noise; Phase frequency detector; Phase locked loops; Synthesizers;
Conference_Titel :
VLSI Circuits (VLSIC), 2013 Symposium on
Conference_Location :
Kyoto
Print_ISBN :
978-1-4673-5531-5
