Noise analysis and measurement of integrator-based sensor interface circuits for fluorescence detection in lab-on-a-chip applications

This paper examines the impact of integrator-based sensor interface circuit parameters, optical parameters, and noise on the limit of detection (LOD) of a fluorescence measurement lab-on-a-chip (LOC) device. Fluorescence detection is a powerful form of signal measurement for LOC-based bio-diagnostic assays. Reduction of the LOD enables a lower concentration of analyte to be measured, diversifying applications of LOC technology. An optical system model of a proposed LOC device is described. This device contains a photodiode and a capacitive transimpedance amplifier (CTIA) sensor interface constructed in a standard complementary metal-oxide-semiconductor (CMOS) technology. Analysis of the noise produced by the interface electronics and photodiode is then carried out, enabling the LOD of the system to be parametrized. The impact of circuit and system parameters on the LOD is then evaluated and compared to simulated and measured results.