DC-Link control strategy for the Actively Clamped Resonant DC-Link Inverter

Author

Yaojie Hou ; Dehua Zhang ; Jiao He

Author_Institution

Coll. of Electr. Eng., Zhejiang Univ., Hangzhou, China

fYear

2013

fDate

3-6 June 2013

Firstpage

93

Lastpage

98

Abstract

The Actively Clamped Resonant DC-Link Inverter(ACRDCLI) has remarkable features of simple structure and high efficiency with only one auxiliary switch. However, there exists unfixed commutation delay in two-amplitude control system, which causes sub-harmonics. This paper presents a DC-Link control strategy for the ACRDCLI. By measuring and analyzing the unfixed delay time, the method shifts forward a calculated part of the delay time to reduce harmonic, and provides appropriate width gate signals to the clamp switch so that the current sensor can be eliminated. The results show that the DC-Link control strategy effectively reduces harmonics and performs very well in the digital system.

Keywords

harmonics suppression; resonant invertors; switching circuits; ACRDCLI; DC-link control strategy; actively clamped resonant DC-link inverter; clamp switch; harmonic reduction; two-amplitude control system; unfixed delay time analysis; unfixed delay time measurement; width gate signals; Delays; Integrated circuits; Switches; Actively clamped resonant DC-Link inverter; DC-Link Control Strategy; DSP; Two-amplitude control;

fLanguage

English

Publisher

ieee

Conference_Titel

ECCE Asia Downunder (ECCE Asia), 2013 IEEE

Conference_Location

Melbourne, VIC

Print_ISBN

978-1-4799-0483-9

Type

conf

DOI

10.1109/ECCE-Asia.2013.6579079

Filename

6579079