• DocumentCode
    634653
  • Title

    A post-deployment IC trust evaluation architecture

  • Author

    Jin, Yichao ; Maliuk, Dzmitry ; Makris, Yiorgos

  • Author_Institution
    Dept. of Electr. Eng. & Comput. Sci., Univ. of Central Florida, Orlando, FL, USA
  • fYear
    2013
  • fDate
    8-10 July 2013
  • Firstpage
    224
  • Lastpage
    225
  • Abstract
    The use of side-channel parametric measurements along with statistical analysis methods for detecting hardware Trojans in fabricated integrated circuits has been studied extensively in recent years, initially for digital designs but recently also for their analog/RF counterparts. Such post-fabrication trust evaluation methods, however, are unable to detect dormant hardware Trojans which are activated after a circuit is deployed in its field of operation. For the latter, an on-chip trust evaluation method is required. To this end, we present a general architecture for post-deployment trust evaluation based on on-chip classifiers. Specifically, we discuss the design of an on-chip analog neural network which can be trained to distinguish trusted from untrusted circuit functionality based on simple measurements obtained via on-chip measurement acquisition sensors. The proposed method is demonstrated using a Trojan-free and two Trojan-infested variants of a wireless cryptographic IC design, as well as a fabricated programmable neural network experimentation chip. As corroborated by the obtained experimental results, two current measurements suffice for the on-chip classifier to effectively assess trustworthiness and, thereby, detect hardware Trojans that are activated after chip deployment.
  • Keywords
    cryptography; integrated circuit design; invasive software; learning (artificial intelligence); neural nets; pattern classification; sensors; statistical analysis; trusted computing; Trojan-free variants; Trojan-infested variants; digital design; fabricated integrated circuits; fabricated programmable neural network experimentation chip; general architecture; hardware Trojan detection; on-chip analog neural network training; on-chip classifier; on-chip measurement acquisition sensors; on-chip trust evaluation method; post-deployment IC trust evaluation architecture; side-channel parametric measurement; statistical analysis method; trusted circuit functionality; trustworthiness assessment; untrusted circuit functionality; wireless cryptographic IC design; Current measurement; Hardware; Semiconductor device measurement; System-on-chip; Trojan horses; Wireless communication;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    On-Line Testing Symposium (IOLTS), 2013 IEEE 19th International
  • Conference_Location
    Chania
  • Type

    conf

  • DOI
    10.1109/IOLTS.2013.6604083
  • Filename
    6604083