DocumentCode
635763
Title
a 10 Gbps burst-mode clock and data recovery circuit with continuous clock output
Author
Yu Runxiang ; Proietti, Roberto ; Shuang Yin ; Yoo, S.J.B. ; Kurumida, Junya
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of California at Davis, Davis, CA, USA
fYear
2012
fDate
11-14 Sept. 2012
Firstpage
1
Lastpage
3
Abstract
This paper presents a 10-Gbps burst-mode clock and data recovery (BM-CDR) circuit based on the phase picking method. Experiment demonstrates the proposed BM-CDR circuit is able to align the burst-mode incoming data to the local clock with a maximum phase misalignment of ±π/8 within 20 ns.
Keywords
clock and data recovery circuits; integrated optoelectronics; passive optical networks; BM-CDR circuit; bit rate 10 Gbit/s; burst-mode clock-and-data recovery circuit; continuous clock output; passive optical networks; phase misalignment; phase picking method; Burst mode; bit synchronization; clock and data recovery; multiphase clock;
fLanguage
English
Publisher
ieee
Conference_Titel
Photonics in Switching (PS), 2012 International Conference on
Conference_Location
Ajaccio
Type
conf
Filename
6608315
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