FPGA implementation of the V-disparity based obstacles detection approach

In this paper we present an implementation of the whole V-disparity obstacles detection approach on an FPGA component. This approach is based on the use of stereoscopic images for the construction of an image called the V-disparity image from which obstacles can be easily extracted using a particular Hough transform. FPGA represents a good alternative for the use of the approach on an embedded system. The implementation of the approach on an FPGA component requires parallelizing all its steps which are the stereoscopic matching, the V-disparity image construction and obstacles extraction using a unidirectional Hough transform. These steps have been described with VHDL language using the ISE 9.2 software. Finally, the entire approach has been implemented on a Virtex-II type XC2V1000 FG456-4 placed on an RC200 board.