Design and measurements results of 7-bit low-power, low area SAR A/D converter for pixel systems

Author

Otfinowski, P. ; Grybos, Pawel

Author_Institution

Dept. of Meas. & Electron., AGH Univ. of Sci. & Technol., Cracow, Poland

fYear

2013

fDate

20-22 June 2013

Firstpage

218

Lastpage

221

Abstract

The design and measurements results of analog-to-digital converter implemented in CMOS 180 nm technology have been presented in this paper. The successive approximation architecture with charge redistribution has been chosen. Much emphasis was placed on limiting the area occupancy of the whole chip so as its power consumption, which makes the described circuit suitable for multichannel applications. The presented converter achieves 2.5 MS/s sampling rate with 7-bit resolution at 77 μW and occupies only 90 μm × 95 μm.

Keywords

CMOS integrated circuits; analogue-digital conversion; integrated circuit design; integrated circuit measurement; low-power electronics; 7 bit low-power SAR AD converter; CMOS technology; analog to digital converter; charge redistribution; low area SAR AD converter; multichannel applications; pixel systems; power 77 muW; power consumption; size 180 nm; successive approximation architecture; Approximation methods; Arrays; CMOS integrated circuits; Capacitors; Clocks; Power demand; Transistors; SAR ADC; low-area; multichannel; pixel ADC;

fLanguage

English

Publisher

ieee

Conference_Titel

Mixed Design of Integrated Circuits and Systems (MIXDES), 2013 Proceedings of the 20th International Conference

Conference_Location

Gdynia

Print_ISBN

978-83-63578-00-8

Type

conf

Filename

6613344