Title :
A logic level countermeasure against CPA side channel attacks on AES
Author :
Menicocci, Renato ; Trifiletti, A. ; Trotta, Fabrizio
Author_Institution :
Fondazione Ugo Bordoni, Rome, Italy
Abstract :
A novel RTL countermeasure intended to protect the AddRoundKey step of the AES algorithm against DPA or CPA attacks has been proposed and tested on an AES encoding coprocessor implemented on FPGA. Experimental results based on CPA attacks confirmed the effectiveness of the proposed countermeasure, showing that with 100000 acquired power curves, the absolute value of correlation function is one order of magnitude lower than in the non-countermeasured case and the correct key is embedded in the measured noise floor.
Keywords :
coprocessors; cryptography; encoding; field programmable gate arrays; AES algorithm; AES encoding coprocessor; CPA side channel attacks; FPGA; RTL countermeasure; add round key step; advanced encryption standard; correlation function; logic level countermeasure; Coprocessors; Correlation; Cryptography; Field programmable gate arrays; Logic gates; Power demand; Registers; AES; CPA; DPA; FPGA; RTL countermeasure; Side Channel Attack;
Conference_Titel :
Mixed Design of Integrated Circuits and Systems (MIXDES), 2013 Proceedings of the 20th International Conference
Conference_Location :
Gdynia
Print_ISBN :
978-83-63578-00-8
