DocumentCode
640458
Title
A high-speed fourth-order nested bus-splitting error feedback modulator
Author
Hongjia Mo ; Kennedy, Michael Peter
Author_Institution
Dept. Electr. & Electron. Eng., Univ. Coll. Cork, Cork, Ireland
fYear
2012
fDate
28-29 June 2012
Firstpage
1
Lastpage
6
Abstract
This paper provides a design methodology for a fourth order nested bus-splitting Error Feedback Modulator (EFM4) intended for an oversampled DAC application. The nested bus-splitting EFM4 runs approximately 38% faster than a conventional EFM4 on a Xilinx Virtex 5 with negligible degradation in spectral performance.
Keywords
circuit feedback; delta-sigma modulation; modulators; system buses; Xilinx Virtex 5; design methodology; digital delta-sigma modulator; error feedback modulator; fourth order nested bus-splitting error; high-speed fourth-order nested bus-splitting; nested bus-splitting EFM4; oversampled DAC application; spectral performance; Digital delta-sigma modulator (DDSM); nesting bus-splitting;
fLanguage
English
Publisher
iet
Conference_Titel
Signals and Systems Conference (ISSC 2012), IET Irish
Conference_Location
Maynooth
Electronic_ISBN
978-1-84919-613-0
Type
conf
DOI
10.1049/ic.2012.0178
Filename
6621157
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