An efficient design of high-accuracy and low-cost FFT

Under the background of air-borne synthetic aperture radar, our aim is to achieve small area of chip and high real-time performance. We propose a method to reduce the cost of twiddle factors memory and keep high accuracy. Meanwhile, we apply parallel memory access scheme to implement FFT processor in order to improve the real-time performance. Combined with practical application, we use stimulant point target signal to test the processor and the design of 4096-point processor using this method reduce the amount of RAM. And the results show that the proposed design indeed reduces the hardware resources and improves the real-time performance.