DocumentCode
644296
Title
Scalable high-performance parallel design for Network Intrusion Detection Systems on many-core processors
Author
Jiang, Haiyang ; Zhang, Guangxing ; Xie, Gaogang ; Salamatian, Kave ; Mathy, Laurent
Author_Institution
Institute of Computing Technology, Chinese Academy of Sciences, China
fYear
2013
fDate
21-22 Oct. 2013
Firstpage
137
Lastpage
146
Abstract
Network Intrusion Detection Systems (NIDSes) face significant challenges coming from the relentless network link speed growth and increasing complexity of threats. Both hardware accelerated and parallel software-based NIDS solutions, based on commodity multi-core and GPU processors, have been proposed to overcome these challenges. This work explores new parallel opportunities afforded by many-core processors for high performance, scalable and inexpensive NIDS. We exploit the huge many-core computational power by adopting a hybrid parallel architecture combining data and pipeline parallelism. We also design a hybrid load balancing scheme, using both ruleset and flow space partitioning. Furthermore, the proposed design leverages particular features of the processor to break the bottlenecks. We have integrated the open source NIDS Suricata into our proposed design and evaluated its performance with synthetic traffic. The prototype exhibits almost linear speedup and can handle up to 7.2 Gbps traffic with 100-bytes packets.
Keywords
Data structures; Engines; Instruction sets; Load management; Protocols; Tiles; load balancing; many-core; network intrusion detection system; parallel;
fLanguage
English
Publisher
ieee
Conference_Titel
Architectures for Networking and Communications Systems (ANCS), 2013 ACM/IEEE Symposium on
Conference_Location
San Jose, CA, USA
Print_ISBN
978-1-4799-1640-5
Type
conf
DOI
10.1109/ANCS.2013.6665196
Filename
6665196
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