Impact of Round Robin Arbiters on router´s performance for NoCs on FPGAs

Routers are the basic building blocks of NoCs and their throughput critically affects the whole network performance. One of the most important building blocks in the router is the arbitration circuit, which controls granting to various requesters when the network is heavily used. In this work we focus on RRAs (Round Robin Arbiters) and their impact on router´s performance and area on various FPGAs. We also propose a new arbiter design, Truth-Table arbiter, specifically aimed towards FPGA devices. Our results show that the arbiter circuit influences the router performance in most cases. Moreover, our newly proposed Truth-Table arbiter shows the same performance as the best existing arbiters but with smaller total area overhead and ease of design.