• DocumentCode
    647393
  • Title

    Low Latency Hybrid Hardware-in-the-Loop Simulator for Railway Traction System

  • Author

    Laisheng Tong ; Huanqing Zou ; Meng Sun ; Bocker, Joachim

  • Author_Institution
    Dept. of Locomotive Dev., CSR Zhuzhou Electr. Locomotive Co., Ltd., Zhuzhou, China
  • fYear
    2013
  • fDate
    15-18 Oct. 2013
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    In this paper, an extreme low latency and flexible real-time hardware-in-the-loop (HiL) simulator based on FPGA and digital processor is introduced and its application on an AC railway vehicle traction system composed of power electronic converter and asynchronous motor is reported. By a novel computation load balancing, a reduced FPGA resource consumption and reduced delay introduced by HiL can be achieved. The power bench validation with a real 230 kW induction motor controller shows that the proposed solution can precisely reconstruct the frequency response of the real motor in a large spectrum.
  • Keywords
    field programmable gate arrays; induction motors; power convertors; power engineering computing; railway electrification; traction; AC railway vehicle traction system; HiL simulator; asynchronous motor; computation load balancing; digital processor; frequency response; induction motor controller; low latency hybrid hardware-in-the-loop simulator; power 230 kW; power electronic converter; railway traction system; real-time hardware-in-the-loop simulator; reduced FPGA resource consumption; reduced delay;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Vehicle Power and Propulsion Conference (VPPC), 2013 IEEE
  • Conference_Location
    Beijing
  • Type

    conf

  • DOI
    10.1109/VPPC.2013.6671735
  • Filename
    6671735