Self-calibration method for capacitor mismatch elimination

An on-die capacitor mismatch elimination method, using reference clock and dc current is presented. The proposed method provides opportunity to measure the difference of the two uniform capacitor values, detect the mismatch due to technology process deviations, and bring it to minimum. In this paper a self-calibration (self-regulation) technique for two identical capacitor mismatch elimination is implemented. The described method allows achieving ±1% accuracy in case of ± 5% mismatch between capacitors, caused by the technological process non-ideality.