DocumentCode
648564
Title
Extracting complete set of equations to analyze VHDL-AMS descriptions
Author
Kamran, Arezoo ; Janfaza, Vahid ; Navabi, Zainalabedin
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of Tehran, Tehran, Iran
fYear
2013
fDate
27-30 Sept. 2013
Firstpage
1
Lastpage
4
Abstract
System designers are increasingly interested in the use of tools and methods letting them describe and simulate mixed signal systems. A pioneer description language for this purpose is VHDL-AMS. Due to special features of this language, the traditional method of analog-circuits analysis, the nodal analysis method that is used in most analog simulators, such as SPICE, cannot be used in simulators using this language. In this paper we present an algorithm that can be used for analysis and simulation of analog parts of systems described in VHDL-AMS language. This algorithm has been used in the analysis engine of a mixed-signal simulator based on VHDL-AMS, and the validity of its operation has been shown.
Keywords
circuit simulation; hardware description languages; integrated circuit design; integrated circuit modelling; mixed analogue-digital integrated circuits; VHDL-AMS descriptions; analog simulators; analog-circuits analysis; mixed signal systems; mixed-signal simulator; nodal analysis method;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Test Symposium, 2013 East-West
Conference_Location
Rostov-on-Don
Print_ISBN
978-1-4799-2095-2
Type
conf
DOI
10.1109/EWDTS.2013.6673149
Filename
6673149
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