DocumentCode
648585
Title
Models for quality analysis of computer structures
Author
Abbas, Mir Aamir ; Chumachenko, S.V. ; Hahanova, A.V. ; Gorobets, A.A. ; Priymak, Aleksey
Author_Institution
Comput. Eng. Fac., Kharkov Nat. Univ. of Radioelectron., Kharkov, Ukraine
fYear
2013
fDate
27-30 Sept. 2013
Firstpage
1
Lastpage
6
Abstract
The methods for estimating computational structures and searching the shortest paths between the pair of nodes are presented. A criterion for evaluating the effectiveness of computational structures based on the graph model of the functional blocks of digital systems-on-chips is developed. A modified Dijkstra´s algorithm to determine the average cost of interconnections in computing architecture for every pair of nodes is proposed. Verification of the criterion, when evaluating the effectiveness of different topologies of computational structures is performed.
Keywords
graph theory; multiprocessor interconnection networks; search problems; system-on-chip; computational structure estimation; computational structure topologies; computer structures quality analysis; computing architecture; digital systems-on-chips; graph model; interconnections; modified Dijkstras algorithm; shortest path estimation;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Test Symposium, 2013 East-West
Conference_Location
Rostov-on-Don
Print_ISBN
978-1-4799-2095-2
Type
conf
DOI
10.1109/EWDTS.2013.6673170
Filename
6673170
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