DocumentCode
648607
Title
System-on-Chip FPGA-based GNSS receiver
Author
Fridman, Alexander ; Semenov, Serguei
Author_Institution
NPO ENERGOMODULE, Moscow, Russia
fYear
2013
fDate
27-30 Sept. 2013
Firstpage
1
Lastpage
7
Abstract
Modern FPGAs offer a cost-efficient alternative to ASICs, and provide the flexibility and scalability to respond rapidly to changing consumer requirements. Soft processor solution such as MicroBlaze makes it possible to integrate a multi-processor system on the single FPGA chip along with the bulk of logic circuitry. Generic FPGA-based architecture of the Global Navigation Satellite System (GNSS) receiver is presented, including a Multi-Processor System, a Multi-Channel Correlator, Fast Search Engine, etc. The generic design is easily reconfigurable for adaptation to various applications such as high-dynamic platforms, or a hard urban environment. Test results of high-dynamic modification of the GNSS receiver are presented, as well as drive test results of the low-cost GNSS receiver option in live hard urban environment are discussed.
Keywords
application specific integrated circuits; field programmable gate arrays; logic circuits; multiprocessing systems; radio receivers; satellite navigation; search engines; system-on-chip; ASIC; Global Navigation Satellite System receiver; MicroBlaze; consumer requirement; fast search engine; generic FPGA-based architecture; hard urban environment; high-dynamic modification; logic circuit; multichannel correlator; multiprocessor system; soft processor solution; system-on-chip FPGA-based GNSS receiver;
fLanguage
English
Publisher
ieee
Conference_Titel
Design & Test Symposium, 2013 East-West
Conference_Location
Rostov-on-Don
Print_ISBN
978-1-4799-2095-2
Type
conf
DOI
10.1109/EWDTS.2013.6673192
Filename
6673192
Link To Document