• DocumentCode
    649071
  • Title

    Signal processing techniques for reliability improvement of sub-20NM NAND flash memory

  • Author

    Dong-hwan Lee ; Jonghong Kim ; Wonyong Sung

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Seoul Nat. Univ., Seoul, South Korea
  • fYear
    2013
  • fDate
    16-18 Oct. 2013
  • Firstpage
    318
  • Lastpage
    323
  • Abstract
    The capacity of NAND flash memory has been continuously increased by adopting process technology scaling and multi-level cell (MLC) data coding. However, the reliability of stored data becomes a very important issue because the scaled feature size lowers the number of electrons at each floating-gate while increasing the cell-to-cell interference. In this paper, we review recent advances in signal processing techniques for reliability improvement of sub-20 nm NAND flash memory, which includes estimation of the threshold voltage distribution, cell-to-cell interference cancellation, and optimal multi-level memory sensing. We also present experimental results for the explained signal processing algorithms. Especially, we demonstrate the reliability improvement when combining all these techniaues.
  • Keywords
    NAND circuits; flash memories; integrated circuit reliability; interference suppression; signal processing; NAND flash memory; cell-to-cell interference cancellation; floating-gate; multilevel cell data coding; optimal multilevel memory sensing; process technology scaling; scaled feature size; signal processing techniques; size 20 nm; stored data reliability; threshold voltage distribution; NAND flash memory; cell-to-cell interference; error correction; signal processing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing Systems (SiPS), 2013 IEEE Workshop on
  • Conference_Location
    Taipei City
  • ISSN
    2162-3562
  • Type

    conf

  • DOI
    10.1109/SiPS.2013.6674526
  • Filename
    6674526