• DocumentCode
    649201
  • Title

    Reversible circuit synthesis using ACO and SA based Quine-McCluskey method

  • Author

    Sarkar, Mohanchur ; Ghosal, P. ; Mohanty, S.P.

  • Author_Institution
    Bengal Eng. & Sci. Univ., Howrah, India
  • fYear
    2013
  • fDate
    4-7 Aug. 2013
  • Firstpage
    416
  • Lastpage
    419
  • Abstract
    With the tremendous growth in VLSI technology in recent years, the Integration density of the transistors has reached billions causing the scaling of transistors to touch the subatomic dimension in deep submicron regime where laws of classical physics can not survive. Due to inherent information loss and other factors associated with irreversible computing, reversible circuits are becoming more and more important in terms of computing for present and future days. However, due to several factors, known synthesis approaches of classical Boolean logic like Karnaugh Map and Quine-McCluskey method cannot be applied directly to synthesize a reversible logic. In this paper, we propose a stochastic procedure to synthesize a reversible circuit. This procedure is based on a modified version of classical Quine-McCluskey method and is being used under the wrapper of two intelligent stochastic search techniques, Simulated Annealing and Ant Colony Optimization. The experimental results are quite encouraging.
  • Keywords
    VLSI; logic circuits; logic design; search problems; simulated annealing; stochastic programming; ACO; Boolean logic; Karnaugh map method; Quine-McCluskey method; SA; VLSI technology; ant colony optimization; intelligent stochastic search techniques; irreversible computing; reversible circuit synthesis; simulated annealing; transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (MWSCAS), 2013 IEEE 56th International Midwest Symposium on
  • Conference_Location
    Columbus, OH
  • ISSN
    1548-3746
  • Type

    conf

  • DOI
    10.1109/MWSCAS.2013.6674674
  • Filename
    6674674