DocumentCode :
649257
Title :
A multilayer crosstalk avoidance router using restricted maze grids
Author :
Fujii, Yuka ; Muraoka, Michiaki ; Toyonaga, Masahiko
Author_Institution :
Grad. Sch. of Sci., Kochi Univ., Kochi, Japan
fYear :
2013
fDate :
4-7 Aug. 2013
Firstpage :
641
Lastpage :
644
Abstract :
In this paper, we propose a basic crosstalk avoidance router using two area usage restrictions. They are “a wide pitch restriction” and “a bounded area restriction”. The wide pitch restriction means that the router using only wider pitch than the minimum pitch from the process technology rule. The bounded area restriction means that a router only executed inside minimum bounding box with some redundancy area of a net. According to the experimental results of some circuits including practical, our proposed router achieved the higher routability results in shorter execution time than those of the conventional maze router.
Keywords :
VLSI; crosstalk; integrated circuit interconnections; integrated circuit modelling; network routing; bounded area restriction; maze router; minimum bounding box; multilayer crosstalk avoidance router; process technology rule; restricted maze grids; wide pitch restriction;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (MWSCAS), 2013 IEEE 56th International Midwest Symposium on
Conference_Location :
Columbus, OH
ISSN :
1548-3746
Type :
conf
DOI :
10.1109/MWSCAS.2013.6674730
Filename :
6674730
Link To Document :
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