Models of irreversibility for binary adders

Heat generation limits the performance of computing systems, ultimately dictated by the thermodynamic necessity to expel energy into the environment proportionally to information loss in the computing process. We develop models to track the irreversible bit erasures in standard binary adders, presenting a methodology to estimate the bounds for components on various levels of design abstraction. The approach can be used to quantify the logical reversibility of a design and direct the optimization efforts for higher degree of energy conservation.