Additive Hough Transform on embedded computing platforms

The Hough Transform (HT) is one of the most widely used feature extraction techniques in real-time applications, like lane departure warning, surveillance etc. Most existing HT implementations are serial in nature, resulting in high computation time. Recently, we proposed the Additive Hough Transform (AHT), which achieves angle and block level parallelism in HT computation. In this paper, we evaluate the performance gains offered by AHT in both serial and parallel configurations by implementing it on different computing platforms such as multicore processors, GPUs and FPGAs. It is shown that AHT offers significant performance gains over existing implementations of the HT in both serial and parallel configurations on a wide range of embedded platforms.