A FPGA based prototype verification in automotive mixed signal integrated circuit development

This paper proposes an improved ASIC design flow for the automotive ASIC development. Using a FPGA based hardware prototype verification step, the improved design flow enables the test of entire design in a running automotive module with different operating conditions, helps to find out issues before the tape out. The proposed design flow can largely increase the confidence level in the tape out, decrease the development time, reduce the risk of multiple re-spin cycles, and lead to a better cost efficiency in the automotive ASIC development. A diesel engine driver circuit design example is used to explain this proposed design flow. The prototype test setting and measurement results are also presented.