Improved non-restoring division algorithm with dual path calculation

This paper focuses on improving the performance of non-restoring division by reducing the delay. To improve its performance, two new approaches are proposed here. For the first proposed approach, a novel method to find a quotient bit for every iteration, which hides the total delay of the multiplexer with dual path calculation is presented. The second new method uses a modified Most Significant Carry (MSC) generator, which determines the sign of each remainder faster than a carry lookahead adder. This reduces the total delay.