• DocumentCode
    649585
  • Title

    Split-cost communication model for improved MPSoC application mapping

  • Author

    Odendahl, Maximilian ; Castrillon, Jeronimo ; Volevach, Vitaliy ; Leupers, Rainer ; Ascheid, Gerd

  • Author_Institution
    Inst. for Commun. Technol. & Embedded Syst., RWTH Aachen Univ., Aachen, Germany
  • fYear
    2013
  • fDate
    23-24 Oct. 2013
  • Firstpage
    1
  • Lastpage
    8
  • Abstract
    Automated mapping of dataflow applications to state-of-the-art, heterogeneous Multiprocessor Systems on Chip (MPSoCs) with complex interconnects and communication means is an ongoing research endeavor. We implement, measure and analyze three different communication libraries for a representative, off-the-shelf platform of this kind. The results of the analysis are used to show the need of a new cost model to properly characterize inter-task communication. Afterwards, this paper presents an algorithm to solve the mapping problem jointly for computation and communication using this cost model. A case study with four real streaming applications shows that the obtained mapping is able to reduce the execution time. Compared to a mapping decision where all channels are mapped to shared memory, the makespan fell down up to 10% due to an automated selection of a more appropriate communication library.
  • Keywords
    integrated circuit interconnections; system-on-chip; MPSoC; application mapping; automated mapping; communication library; complex interconnects; heterogeneous multiprocessor systems on chip; intertask communication; mapping decision; split-cost communication model;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    System on Chip (SoC), 2013 International Symposium on
  • Conference_Location
    Tampere
  • Type

    conf

  • DOI
    10.1109/ISSoC.2013.6675280
  • Filename
    6675280