DocumentCode
65191
Title
High Throughput LDPC Decoder on GPU
Author
Yong Lin ; Wensheng Niu
Author_Institution
Dept. of Phys. & Inf. Eng., Ningxia Normal Univ., Guyuan, China
Volume
18
Issue
2
fYear
2014
fDate
Feb-14
Firstpage
344
Lastpage
347
Abstract
The available Lower Density Parity Check (LDPC) decoders on Graphics Processing Unit (GPU) do not simultaneously read and write contiguous data blocks in memory because of the random nature of LDPC codes. One of these two operations has to be performed using noncontiguous accesses, resulting in long access time. To overcome this issue, we designed a multi-codeword parallel decoder with fully coalesced memory access. To test the performance of the method, we applied the method using an 8-bit compact data. The experimental results demonstrated that the method achieved more than 550Mbps throughput on Compute Unified Device Architecture (CUDA) enabled GPU.
Keywords
decoding; graphics processing units; parity check codes; GPU; compute unified device architecture; contiguous data blocks; graphics processing unit; high throughput LDPC decoder; long access time; lower density parity check decoders; Decoding; Graphics processing units; Message systems; Parity check codes; Performance evaluation; Sparse matrices; Throughput; CUDA; GPU; LDPC code; decoding; parallel processing;
fLanguage
English
Journal_Title
Communications Letters, IEEE
Publisher
ieee
ISSN
1089-7798
Type
jour
DOI
10.1109/LCOMM.2014.010214.132406
Filename
6715256
Link To Document