DocumentCode
652528
Title
A GRASP for Placement and Routing of Dataflow Process Networks on Many-Core Architectures
Author
Stan, O. ; Sirdey, Renaud ; Carlier, J. ; Nace, Dritan
Author_Institution
Embedded Real Time Syst. Lab., CEA, Gif-sur-Yvette, France
fYear
2013
fDate
28-30 Oct. 2013
Firstpage
219
Lastpage
226
Abstract
We propose a GRASP heuristic for solving the joint problem of placement and routing of process networks from the field of compilation for embedded many core architectures. The method we propose consists in assigning applications expressed as dataflow process networks on homogeneous many core architectures by taking into account the routing maximal capacity of the arcs for the underlying Network-On-Chip. Our experiments illustrate the algorithm ability to efficiently obtain good quality routable assignments, within an acceptable computational time, even for large size instances. Moreover, validation of our approach is also realized on data coming from an embedded application of video processing.
Keywords
data flow computing; multiprocessing systems; network-on-chip; parallel architectures; GRASP heuristic; Network-On-Chip; dataflow process networks; embedded many core architectures; video processing; Bandwidth; Computer architecture; Joints; Optimization; Parallel processing; Routing; System-on-chip; GRASP heuristic; dataflow compilation; parallel embedded systems; placement; routing;
fLanguage
English
Publisher
ieee
Conference_Titel
P2P, Parallel, Grid, Cloud and Internet Computing (3PGCIC), 2013 Eighth International Conference on
Conference_Location
Compiegne
Type
conf
DOI
10.1109/3PGCIC.2013.39
Filename
6681232
Link To Document