DocumentCode :
656242
Title :
A Power-Aware Study of Iris Matching Algorithms on Intel´s SCC
Author :
Torres, Gerardo ; Chang, Jed Kao-Tung ; Fang Hua ; Chen Liu ; Schuckers, Stephanie
Author_Institution :
Dept. of Electr. & Comput. Eng., Clarkson Univ., Potsdam, NY, USA
fYear :
2013
fDate :
1-4 Oct. 2013
Firstpage :
1028
Lastpage :
1037
Abstract :
Biometric applications become paramount across private sectors, industry, as well as government agencies. As large amount of data being collected from many different sources, managing such volumes of data and developing efficient and effective large-scale operational solutions are becoming a concern. For example, real-time identification of individuals with the purpose of allowing or denying their access to specific system or resource is challenging from the performance point of view. In addition, processing large amount of data would definitely consume a significant amount of energy. The Single-chip Cloud Computer (SCC) is an experimental processor created by Intel Labs. In this paper we employ SCC, which supports dynamic frequency and voltage scaling (DVFS), to investigate the power-aware computing and performance enhancement of an iris matching algorithm on such many-core architecture. This biometric application contains a large degree of parallelism that we can exploit by porting it onto the SCC. Results in terms of performance, power, energy, energy delay product (EDP), and power per speedup (PPS) metrics of executing the iris matching application under different number of cores, frequency, and voltage settings of the SCC platform are presented. We also analyze how the results for these metrics vary as we change these parameters.
Keywords :
cloud computing; image matching; iris recognition; microprocessor chips; multiprocessing systems; parallel processing; power aware computing; DVFS; EDP metric; Intel Labs; Intel SCC; PPS metric; SCC platform frequency; SCC platform voltage settings; biometric application; dynamic frequency and voltage scaling; energy delay product; energy metric; iris matching algorithm; many-core architecture; parallelism; performance enhancement; performance metric; power metric; power per speedup; power-aware computing; single-chip cloud computer; Computer architecture; Hamming distance; Hardware; Iris recognition; Measurement; Signal processing algorithms; Tiles; Biometrics; Dynamic Voltage and Frequency Scaling; Iris Pattern Recognition; Many-Core Processor; Power-Aware Computing; Single-chip Cloud Computer;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Processing (ICPP), 2013 42nd International Conference on
Conference_Location :
Lyon
ISSN :
0190-3918
Type :
conf
DOI :
10.1109/ICPP.2013.122
Filename :
6687447
Link To Document :
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