Title :
A 6-GS/s 6-bit time interleaved SAR-ADC
Author :
Hao Huang ; Grozing, M. ; Digel, J. ; Ferenci, Damir ; Lang, Fengkai ; Berroth, Manfred
Author_Institution :
Inst. of Electr. & Opt. Commun. Eng., Univ. of Stuttgart, Stuttgart, Germany
Abstract :
This paper presents a 6-GS/s 6-bit time-interleaved successive approximation register (SAR) analog to digital converter (ADC) realized in 90-nm CMOS. The ADC consists of 32 single SAR-ADCs. The measured effective-number-of-bits (ENOB) at sampling rate of 6.144 GS/s are 5-bit at DC and 3.6-bit at the Nyquist frequency. The power consumption of the ADC-core without I/O´s and 4-to-1 output MUX is 359 mW for an input swing of 1 V peak to peak differential, resulting in a FOM of 4.9 pJ/conv.
Keywords :
CMOS digital integrated circuits; analogue-digital conversion; power consumption; ADC-core; CMOS; ENOB; Nyquist frequency; SAR analog to digital converter; bit rate 6.144 Gbit/s; effective-number-of-bits; interleaved SAR-ADC; power consumption; size 90 nm; time-interleaved successive approximation register; word length 3.6 bit; word length 5 bit; CMOS integrated circuits; Calibration; Clocks; Frequency measurement; Layout; Registers; Semiconductor device measurement; Analog-digital conversion; CMOS integrated circuits; calibration;
Conference_Titel :
Microwave Integrated Circuits Conference (EuMIC), 2013 European
Conference_Location :
Nuremberg
