DocumentCode
658561
Title
A Cost-Effective Scheme for Network-on-Chip Router and Interconnect Testing
Author
Dong Xiang
Author_Institution
Sch. of Software, Tsinghua Univ., Beijing, China
fYear
2013
fDate
18-21 Nov. 2013
Firstpage
207
Lastpage
212
Abstract
3-D technology for networks-on-chip (NoCs) becomes attractive. It is important to present an effective scheme for 3-D stacked NoC router and interconnect testing. A new approach to testing of NoC routers is proposed by classifying the routers. Routers with different input/output ports fall into different classes. Routers of the same class are identical, whose tests are the same. A new unicast-based multicast scheme is proposed for the identical routers. A new test application scheme is proposed for interconnect testing. Sufficient experimental results are presented.
Keywords
integrated circuit interconnections; integrated circuit testing; network routing; network-on-chip; 3D stacked NoC router; 3D technology; NoC routers; cost-effective scheme; identical routers; input/output ports; interconnect testing; network-on-chip router; networks-on-chip; unicast-based multicast scheme; Circuit faults; Hardware; Pins; Routing; Testing; Unicast; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium (ATS), 2013 22nd Asian
Conference_Location
Jiaosi Township
ISSN
1081-7735
Type
conf
DOI
10.1109/ATS.2013.46
Filename
6690642
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