DocumentCode
658902
Title
An analog online clustering circuit in 130nm CMOS
Author
Junjie Lu ; Young, Stephanie ; Arel, Itamar ; Holleman, Jeremy
Author_Institution
Univ. of Tennessee, Knoxville, TN, USA
fYear
2013
fDate
11-13 Nov. 2013
Firstpage
177
Lastpage
180
Abstract
An analog clustering circuit is presented. It is capable of inferring the underlying pattern and extracting the statistical parameters from the input vectors, as well as providing measures of similarity based on both mean and variance. A floating-gate analog memory provides non-volatile storage. A current-mode distance computation, a time-domain loser-take-all and a memory adaptation circuit implement efficient and robust learning algorithm. We show that our analog computation element can achieve more than 10x higher energy efficiency than its digital counterpart. An 8-dimension 4-centroid prototype was fabricated in a 130 nm standard CMOS process. Measurement results demonstrate vector classification at 16 kHz, and unsupervised online clustering at 4 kHz with a power consumption of 15 μW.
Keywords
CMOS integrated circuits; learning (artificial intelligence); pattern clustering; random-access storage; statistical analysis; vectors; 8-dimension 4-centroid prototype; analog online clustering circuit; current-mode distance computation; floating-gate analog memory; memory adaptation circuit; nonvolatile storage; power 15 muW; robust learning algorithm; size 130 nm; standard CMOS process; statistical parameters; time-domain loser-take-all; vector classification; Computer architecture; Current measurement; Energy efficiency; Nonvolatile memory; Prototypes; Reactive power; Vectors;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference (A-SSCC), 2013 IEEE Asian
Conference_Location
Singapore
Print_ISBN
978-1-4799-0277-4
Type
conf
DOI
10.1109/ASSCC.2013.6691011
Filename
6691011
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