Title :
A 2×2 MIMO 802.11 b/g/n WLAN SOC in 55nm CMOS for AP/Router application
Author :
Ying-Yao Lin ; Wen-Kai Li ; Pi-An Wu ; Chih-Lung Chen ; Yibin Hsieh ; Lu, Erl-Huei ; Rostami, Edris ; Huang, Bryan L. ; Wu, Bin ; Jenwei Ko ; Keng Fong ; Yen-Lin Huang ; Chun-Yi Wu ; Chia-Hsin Wu ; Jerng, A.
Author_Institution :
MediaTek Inc., Hsinchu, Taiwan
Abstract :
A single-chip 2×2 MIMO 802.11 b/g/n compliant WLAN AP/Router system-on-a chip(AP/Router SOC) that integrates all RF, analog, digital PHY, MAC, CPU and 5-port Ethernet functions as well as all necessary peripheral blocks has been integrated in 55nm CMOS. To reduce rBOM and PCB design complexity, two high power CMOS PAs, LNAs, and T/R switches are integrated for the MIMO transceiver. The radio transmits 22.4 dBm CCK mask compliant power and delivers 19dBm with EVM= -30dB at HT20 and 18dBm with EVM= -30dB at HT40. CCK RX sensitivity at the shared antenna port is -99dBm at 1Mbps rate, while CCK RX sensitivity is -100dBm at the auxiliary LNA path.
Keywords :
CMOS analogue integrated circuits; MIMO communication; low noise amplifiers; network routing; radio transceivers; system-on-chip; wireless LAN; 5-port Ethernet functions; AP/router SOC; AP/router application; AP/router system-on-a chip; CCK RX sensitivity; CCK mask compliant power; CPU; MAC; MIMO 802.11 b/g/n WLAN SOC; MIMO transceiver; PCB design complexity; RF; T/R switches; analog; auxiliary LNA path; digital PHY; high power CMOS PA; peripheral blocks; rBOM; shared antenna port; single-chip MIMO 802.11 b/g/n compliant; size 55 nm; CMOS integrated circuits; Calibration; MIMO; Radio frequency; Sensitivity; System-on-chip; Transceivers; 2×2; CMOS; IEEE 802.11n; MIMO; WLAN SOC; frequency synthesizer; integrated LNA; integrated PA; integrated T/R switch;
Conference_Titel :
Solid-State Circuits Conference (A-SSCC), 2013 IEEE Asian
Conference_Location :
Singapore
Print_ISBN :
978-1-4799-0277-4
DOI :
10.1109/ASSCC.2013.6691016
