Comparative Study of Various Latch-Type Sense Amplifiers

Author

Taehui Na ; Seung-Han Woo ; Jisu Kim ; Hanwool Jeong ; Seong-Ook Jung

Author_Institution

Sch. of Electr. & Electron. Eng., Yonsei Univ., Seoul, South Korea

Volume

22

Issue

2

fYear

2014

fDate

Feb. 2014

Firstpage

425

Lastpage

429

Abstract

When the input voltage difference of a sense amplifier (SA) exceeds the offset voltage (VOS), the SA correctly detects it and outputs a large signal. However, when the input voltage is in a certain region, the SA can fail to sense the input voltage difference even if it is sufficiently large. This input voltage region is defined as the sensing dead zone of the SA. Because sensing dead zones differ depending on SAs and the input voltages to the SA differ depending on the memory devices, analyzing the sensing dead zone is very important. In this brief, we analyze the sensing dead zones of the most popular latch-type SAs: voltage- and current-latched SAs. Furthermore, a suitable latch-type SA scheme is suggested for various SA input voltages in terms of sensing delay, power consumption, and PDP, using a 65-nm predictive technology model at a VDD of 1.1 V.

Keywords

CMOS integrated circuits; amplifiers; semiconductor storage; PDP; dead zone sensing; input voltage region; latch type sense amplifiers; memory device; offset voltage; power consumption; predictive technology model; sensing delay; size 65 nm; voltage 1.1 V; Delay; MOS devices; Power demand; Sensors; Transistors; Very large scale integration; Latch-type; mismatch; offset voltage; sense amplifier (SA); sensing dead zone;

fLanguage

English

Journal_Title

Very Large Scale Integration (VLSI) Systems, IEEE Transactions on

Publisher

ieee

ISSN

1063-8210

Type

jour

DOI

10.1109/TVLSI.2013.2239320

Filename

6468116